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Wine Pairs with Semiconductor IP at Constellations’ Fourth Annual Silicon Valley IP Users Conference

IPextreme and Constellations members bring technical content to a relaxing conference setting

Campbell, Calif. – Oct 6, 2015 – Together with its coalition of Constellations companies, IPextreme, Inc. today announced its fourth annual Silicon Valley IP Users Conference, a private event centered on semiconductor intellectual property and aimed at bridging the gap between IP suppliers and IP users. This one-day conference will be held at Testarossa Winery in Los Gatos, California on Tuesday, October 20, 2015. The day will be filled with content surrounding new technology, market trends, and challenges facing players in the IP industry. Breakfast, lunch, and a special wine tasting reception featuring a flight of Testarossa wines round out this free event.

Eric Stein of PricewaterhouseCoopers will open the conference with a keynote address on the challenges and best practices of IP compliance. Technical content abounds throughout the day; IPextreme and Constellations member companies Sonics, Toshiba Information Systems, SoC Solutions, and Certus Semiconductor will share concise, “deep-tech” presentations examining IP-related topics not often seen outside the pages of a white paper. In these thirty-minute sessions, presenters will delve into today’s cutting-edge IP products to equip attendees with the knowledge they need to make informed decisions for their next design projects. IPextreme’s industry partner, Silvaco, will discuss how their EDA tools can benefit IP designers. Finally, two panel discussions will examine the state of the IP market and debate whether IP is more accurately termed a product business or a services business. A full conference agenda can be found below. 

“We know that engineers are hungry for technical content without all the marketing fluff and sales pitches, and we are thrilled to bring them exactly that,” said Warren Savage, President and CEO of IPextreme. “It is our pleasure to extend an invitation to design managers and their teams to join us at the beautiful and relaxing Testarossa Winery. Come for the top-notch content, stay for the food and a guided wine tasting. I think you’ll find that semiconductor IP and wine are a perfect pairing.”

Event Registration

The Silicon Valley Users Conference is a two-part event, with content divided into morning and afternoon sessions. Attendees may register for one or both sessions as their schedules allow. This free event will be of value to anyone using semiconductor IP, particularly design managers and their teams. Attendees will enjoy complimentary breakfast, lunch, and an afternoon reception featuring a guided wine tasting of Testarossa vintages.

To register, please email SVIPUC@ip-extreme.com from your corporate email account, indicating Morning Only, Afternoon Only, or Full Day attendance.

Detailed Conference Agenda

Morning Session (9:00 AM – 12:00 PM)

Time Speaker/Topic
8:30-9:00 Registration & Breakfast
9:00 Morning Keynote Address by Eric Stein, Director, Licensing and Contract Compliance, PricewaterhouseCoopers
Topic: IP Compliance: Challenges and Best Practices
Abstract: Eric Stein is a director in PwC's forensic accounting practice. He has over 15 years of licensing management and contract compliance experience. Eric specializes in advising technology licensors and licensees. He has performed over 200 contract compliance inspections throughout the world.
9:20 Technical Presentation by SoC Solutions
Topic: What’s Your Bright Idea?
Speaker: Jim Bruister, President
Abstract: We have all witnessed the “light bulb” moment when someone has a brilliant new idea. It happens every day in the semiconductor industry. Chips today are expected to be like top students: they have to be smart, have good communication skills, speak different languages, and do it all while exerting very little effort. This common thread translates very well to IoT chip architecture. In this session, we will explore those architectures and how they enable new designs and products for the connected world.
9:50 Technical Presentation by IPextreme
Topic: When IP Falls Through the Cracks
Speaker: Warren Savage, President & CEO
Abstract: As the amount of 3rd-party IP content in today’s chips continues to explode, it is creating not only a “big data” problem around IP management to ensure the right versions of the IP is being used, but also a big liability risk around the increasing problem of “accidental reuse” wherein IP is being reused within the company without a valid license. In this session, IPextreme will delve into some new technology we have developed to allow semiconductor companies to gain a clear picture of the 3rd-party IP that is contained in their chips—without reliance on GDSII tags.
10:20-10:30 Short Break
10:30 Technical Presentation by Sonics, Inc.
Topic: Introducing the ICE-Grain Power Architecture for Mainstream SoC Designs—the Semiconductor IP Industry’s First Power Management Solution
Speaker: Randy Smith, VP Marketing
Abstract: Power is on everyone’s mind, whether you’re creating an application processor for mobile phones or an SoC for IoT or Wearable applications. Conventional software-based power management approaches don’t save enough power. This presentation will cover the need for a hardware-based power management solution for mainstream SoC designs. It will introduce Sonics’ ICE-Grain Power Architecture, which is the semiconductor IP industry’s first complete power management subsystem. It will discuss the key capabilities and benefits of the ICE-Grain Power Architecture and explain how the solution makes sophisticated power management and control techniques available to a broader audience.
11:00 Panel Discussion: State of the Semiconductor IP Market: Where are we? Where are we going?
Moderator: Ed Sperling, Semiconductor Engineering
• Judd Heape, Vice President, Product Applications, Apical
• Bernard Murphy, Principal, edabuzz.com
• Rob Aitken, Research & Development Fellow, ARM
• Mike Gianfagna, VP Marketing, eSilicon
Overview: This panel will delve into many of the semiconductor IP industry’s most pressing questions:
• Is the IP market yet fully mature, or still an “awkward teenager”?
• What are the effects of consolidation?
• What is wrong with the market at present? What works well?
• Is the market evolving in such a way that it can continue to serve the needs of customers?
We will conclude the discussion with a brief roundtable segment in which the audience may pose questions to the moderator and panelists.

Networking Lunch (12:00 PM – 1:00 PM)

Enjoy a thoughtfully crafted buffet-style meal, great conversation, and California’s famous mild autumn weather in Testarossa’s Wine Bar 107 courtyard.

Afternoon Session (1:00 PM – 4:00 PM)

Time Speaker/Topic
12:30-1:00 Afternoon-Only Registration
1:00 Afternoon Opening Remarks by Warren Savage, President & CEO, IPextreme
Topic: Buying IP Without Selling Your Soul
Abstract: Warren Savage is perhaps one of the most recognizable figures in the semiconductor industry. He has spent his entire career in Silicon Valley working with leading companies, including Fairchild Semiconductor, Tandem Computers, and Synopsys, where he focused on the problem of building a global, scalable semiconductor intellectual property business. In 2004, Warren founded IPextreme with the mission of unlocking and monetizing captive IP held within semiconductor companies and making it available to customers all over the world. Warren holds a BS in Computer Engineering from Santa Clara University and an MBA from Pepperdine University.
1:20 Technical Presentation by Silvaco
Topic: Designing IP With Silvaco EDA Tools
Speaker: Brian Bradburn, Sr. Director
Abstract: Brian Bradburn is Head of Silvaco's EDA product group, driving the design, development and vision of the front-end and back-end flow of products. Formerly a senior engineering manager, Bradburn has extensive experience in developing and managing large-scale applications for a wide range of products, including e-mail monitoring programs, and system diagnostic and circuit design tools.
1:50 Technical Presentation by Toshiba Information Systems (Japan) Corporation
Topic: Making Silicon Dreams Come True
Speaker: Peng Liu, Marketer/Field Applications Engineer, LSI Services Division
Abstract: Design services are an increasingly important part of the semiconductor ecosystem, evolving to adapt to the needs of the customer. We will present some examples of the design challenges that our customers have faced and how we have addressed them with a variety of methodologies, skills, and experience to provide differentiated products to our customers. We will also offer an overview of our IP products and turnkey service.
2:20-2:30 Short Break
2:30 Technical Presentation by Certus Semiconductor
Topic: Conquering Your Fears of Custom IP
Speaker: Stephen Fairbanks, Managing Director
Abstract: Reliability, cost, and working silicon are the key concerns for designers considering using custom IP to differentiate their chips from those of competitors. Custom IP can seem like an additional risk, but in actuality, it can be the secret weapon that helps you to take your design to the next level. Let’s explore how customers can collaborate with their IP suppliers to ensure success.
3:00 Afternoon Panel Discussion: IP: Product or Service?
Moderator: Rich Goldman, Partner, Silicon Catalyst
Hans Bouwmeester, VP Engineering Operations, Open-Silicon
Rob Cosaro, Fellow, Silicon Valley Center, Freescale
Bruce Elder, Director, Intellectual Property and Licensing, IDT
Oliver Gunasekara, CEO & Co-Founder, NGCodec
Claude Moughanni, Senior Director of Solutions, Verification, Validation and Characterization, Lattice Semiconductor
Abstract: It is a debate as old as the semiconductor IP industry itself: is IP a product business or a service business? Might it potentially be both? This panel will explore this conundrum, including touching on the following questions:
• Is the IP industry primarily rooted in products or services?
• What are the benefits to offering both products and services? What are the difficulties?
• What does the average customer want? Off-the-shelf? Partial customization? Full custom? What are the various challenges of each?
We will conclude the discussion with a brief roundtable segment in which the audience may pose questions to the moderator and panelists.

Networking Reception (4:00 – 5:00 PM)
Sponsored by EDA Consortium

Enjoy beautiful autumn weather, a guided wine tasting flight of five Testarossa vintages, and engaging conversation in Testarossa’s picturesque Wine Bar 107 courtyard.

For additional details, visit http://www.ip-extreme.com/events/ipusersconf2015.shtml.

About Constellations

“Cooperate. Collaborate. Win.”Constellations is a collective of independent IP companies and industry partners working together at both the marketing and engineering levels to develop and promote advanced IP solutions. IPextreme initiated Constellations in 2010 and is the driving force behind the collective, serving as program organizer and facilitator. Constellations member companies currently include: Adapt-IP; Atrenta Inc.; Certus Semiconductor; IPextreme, Inc.; Methods2Business B.V.; SoC Solutions, LLC; Sonics, Inc.; Toshiba Information Systems (Japan) Corporation; and UltraSoC Technologies Ltd.

Companies participating in Constellations offer complementary products, creating a comprehensive portfolio of semiconductor IP from which customers can develop complete SoC solutions. The program is open only to non-competing companies to encourage teamwork and cooperation—member companies work together, share resources to promote mutual success, and participate in collective events.

Products of Constellations companies are featured in the Constellations Semiconductor IP Center, powered by IPextreme’s Xena™ IP management system. The IP Center enables members to easily catalog, distribute, and support their products. Each member company is given a private area on the Xena cloud with full access to all capabilities of Xena. The IP Center also provides a convenient method for member companies and their customers to recommend IP products from other member companies to colleagues and other customers. Registered guests can browse all available IP and services in the Constellations Semiconductor IP Center for free at https://constellations.xena-cloud.com.

Constellations Membership and Pricing

The Constellations program continues to expand and grow, and enrollment is currently open. Annual membership in the Constellations program is $5,000. Included with this fee are two full Xena user licenses. Additional Xena licenses are available to Constellations members at a 50% discount.

For more information and details on becoming a part of this groundbreaking initiative, visit http://www.ip-extreme.com/partners/constellations.shtml.

About IPextreme, Inc.

Founded in 2004, IPextreme is a privately held company providing an array of innovative business and technical solutions focused around the licensing of semiconductor intellectual property (IP) within the global electronics market. Working with the largest semiconductor companies in the world, including Freescale, Infineon, Intel, NXP, National Semiconductor, and Texas Instruments, IPextreme unlocks the value of captive intellectual property assets and then licenses that IP to other companies. IPextreme’s cloud-based Xena™ software provides semiconductor and IP companies with enterprise-level management of their entire IP portfolios and operations. In 2010, IPextreme created Constellations™, a collective of independent IP companies and industry partners working together at both the marketing and engineering levels to develop and promote advanced IP solutions to common customers.

IPextreme has over 100 customers in more than twenty countries. Offices are located in Campbell, California; Munich, Germany; and Tokyo, Japan, with representatives in Europe, China, India, Israel, Korea, and Taiwan.