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USB 2.0 PHY

The USB 2.0 PHY is built on the TSMC 90nm LP process and fully compliant with the USB 2.0 specification for High-Speed, Full-Speed, and Low-Speed applications, including OTG features.

FEATURES
  • Fully USB 1.1 (FS and LS) and USB 2.0 (HS) compliant
  • Integrated 1.5 kΩ pull-up resistor on dp and 45Ω and 15kΩ pull-down termination resistors on dp and dm as defined in USB 2.0
  • Option for use of external 1.5 kΩ pull-up resistor on dp and 15kΩ pull-down termination resistors on dp and dm
  • 8 or 16-bit parallel word UTMI+ compliant interface
  • UTMI+ v1.0 level3
  • UTMI+ On-the-Go features including:
    • Mini-A or mini-B detect
    • Vbus comparators
  • 60-MHz (8-bit interface) or 30-MHz (16-bit interface) clock out
  • 480-MHz clock in.
  • Resetable dividers to align output clocks of multiple transceivers
  • High, Full, and Low-Speed disconnect detection
  • Low current consumption in functional mode
  • Low current consumption in suspend mode
  • Small area (0.9mm2 in 90nm)
DELIVERABLES
  • Behavioral model
  • Front-end and back-end views
  • Documentation including User's Guide and Integration Guide

For more product information, please contact info@ip-extreme.com.